At this year’s Design Automation Conference (DAC), Veriest organized two highly successful technical sessions focusing on cutting-edge topics in chip design: Network on Chip (NoC) architecture and AI co-pilots for chip design.
The GenAI for chip design session, co-organized by Veriest’s CEO, Moshe Zalcberg, proved particularly compelling, with attendance reaching capacity almost immediately. The session featured notable presentations from Microsoft’s Amber Telfer, NVIDIA’s Sid Dhodhi, and Voltai’s Priyanka Mathikshara, with Serge Leef from Microsoft hosting the discussions. The overwhelming response underscored the industry’s keen interest in AI-assisted design tools.
The Network on Chip (NoC) session, another Veriest initiative, brought together key industry figures including Guillaume Boillet from Arteris, Kamal Desai from Synopsys, and Jonathan Ezroni from Mobileye. Veriest’s own Andrea Majstorović delivered crucial insights on verification challenges in NoC design. The session, co-organized with Frank Schirrmeister and Dusica Glisic, highlighted NoC’s growing importance in modern chip architecture.
Zalcberg’s observation of DAC’s evolution this year proved particularly insightful. The conference’s rebranding from “Design Automation Conference” to “DAC, The Chips to Systems Conference” reflected a significant shift in the industry’s direction. This transformation was evident in the keynote speaker lineup, which featured systems-focused executives like Jim Keller (Tenstorrent), Gary Patton (Intel), and Alan Lee (ADI), marking a departure from the traditional EDA-centric approach of previous years.
The successful organization of these sessions by Veriest, complemented by the support of Ambar Sarkar and the coordination efforts of Rotem Binder and Alexis Bauer Kolak, reinforces the company’s position at the forefront of chip design and verification innovation. As the industry continues to evolve, Veriest remains committed to fostering knowledge sharing and technological advancement in the semiconductor sector.