RISC-V is transforming the semiconductor world, bringing flexibility, customizability, and a thriving ecosystem for chip design. But with these advantages come challenges in conformance, verification, and validation, as highlighted in @Semiconductor Engineering’s recent “Experts At The Table” discussion with industry leaders.
https://semiengineering.com/risc-v-conformance/
Here are a few interesting insights:
- Frank Schirrmeister (Synopsys): “[With RISC-V], you can extend it and do your own thing, but then you’re out of luck because you have to verify all the changes you made.”
- John Min (Arteris): “As the CPU gets adopted more widely, we have third party software vendors writing software that assumes it is independent, and a hardware abstraction layer, assuming things will be compatible.”
- Neil Hand (Siemens): “There isn’t one solution for anything. You want to use a mix of #formal and #simulation to make sure your processor is correct. You want to be able to use the big boxes [#emulation] to make sure you’re running software on there. You want to be able to use virtual prototypes early to make the decision about whether to run this particular set of workloads on it, or to benchmark different processor vendors. It is all of these working together.”
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At Veriest, we’ve worked on numerous RISC-V projects, providing our clients with a full range of design and verification solutions. Whether it’s ISA compliance, custom instruction validation, or software compatibility testing, our experienced team brings expertise across the verification landscape, ensuring our clients’ RISC-V designs meet the highest standards.
If you’re developing RISC-V-based solutions and want confidence that your designs are ready for market, let’s connect. Veriest can help you navigate the complexities of RISC-V verification and bring your vision to life.